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ltc2912 1 2912f typical application features applications description single uv/ov voltage monitor the ltc ? 2912 voltage monitor is designed to detect power supply undervoltage and overvoltage events. the vl and vh monitor inputs include ? ltering to reject brief glitches, thereby ensuring reliable reset operation without false or noisy triggering. an adjustable timer de? nes the duration of the overvoltage and undervoltage reset outputs which func- tion independently. while the ltc2912 operates directly from 2.3v to 6v supplies, an internal v cc shunt regulator coupled with low supply current demand allows operation from higher voltages such as 12v, 24v or 48v. three output con? gurations are available: the ltc2912-1 has a latch control for the ov output; the ltc2912-2 has an ov and uv output disable feature for margining ap- plications; the ltc2912-3 is identical to the ltc2912-1 but with a noninverting, ov output. the ltc2912 provides a precise, versatile, space-conscious micropower solution for voltage monitoring. monitors single voltage adjustable uv and ov trip values guaranteed threshold accuracy: 1.5% power supply glitch immunity adjustable reset timeout with timeout disable 40a quiescent current open-drain ov and uv outputs guaranteed ov and uv for v cc 1v available in 8-lead thinsot tm and (3mm 2mm) dfn packages desktop and notebook computers network servers core, i/o voltage monitors single ov/uv supply monitor, 3.3v 10% tolerance reset time-out period vs capacitance , lt, ltc and ltm are registered trademarks of linear technology corporation. thinsot is a trademark of linear technology corporation. all other trademarks are the property of their respective owners. 1k 27.4k vh vl gnd tmr system power supply ov uv 2912 ta01a latch 22nf timeout = 200ms 4.53k v cc ltc2912-1 0.1 f 3.3v tmr pin capacitance, c tmr (nf) 10 uv/ov timeout period, t uoto (ms) 100 1000 10000 0.1 10 100 1000 2912 g08 1 1
ltc2912 2 2912f package/order information absolute maximum ratings terminal voltages v cc (note 3) ............................................. C0.3v to 6v ov, uv, ov ............................................. C0.3v to 16v tmr .......................................... C0.3v to (v cc + 0.3v) vh, vl, latch, dis .............................. C0.3v to 7.5v terminal currents i vcc ....................................................................10ma i uv , i ov , i ov ........................................................10ma (note 1) latch 1 uv 2 ov 3 gnd 4 8 v cc 7 vh 6 vl 5 tmr top view ts8 package 8-lead plastic tsot-23 t jmax = 125c, ja = 130c/w top view 9 ddb package 8-lead (3mm 2mm) plastic dfn 5 6 7 8 4 3 2 1 v cc vh vl tmr latch uv ov gnd t jmax = 150c, ja = 76c/w exposed pad (pin 9) is gnd, connection to pcb optional order part number ts8 part marking* order part number ddb part marking* ltc2912cts8-1 ltc2912its8-1 ltcjw ltcjw ltc2912cddb-1 ltc2912iddb-1 lcjz lcjz dis 1 uv 2 ov 3 gnd 4 8 v cc 7 vh 6 vl 5 tmr top view ts8 package 8-lead plastic tsot-23 t jmax = 125c, ja = 130c/w top view 9 ddb package 8-lead (3mm 2mm) plastic dfn 5 6 7 8 4 3 2 1 v cc vh vl tmr dis uv ov gnd t jmax = 150c, ja = 76c/w exposed pad (pin 9) is gnd, connection to pcb optional order part number ts8 part marking* order part number ddb part marking* ltc2912cts8-2 ltc2912its8-2 ltcjx ltcjx ltc2912cddb-2 ltc2912iddb-2 lckb lckb latch 1 uv 2 ov 3 gnd 4 8 v cc 7 vh 6 vl 5 tmr top view ts8 package 8-lead plastic tsot-23 t jmax = 125c, ja = 130c/w top view 9 ddb package 8-lead (3mm 2mm) plastic dfn 5 6 7 8 4 3 2 1 v cc vh vl tmr latch uv ov gnd t jmax = 150c, ja = 76c/w exposed pad (pin 9) is gnd, connection to pcb optional order part number ts8 part marking* order part number ddb part marking* ltc2912cts8-3 ltc2912its8-3 ltcjy ltcjy ltc2912cddb-3 ltc2912iddb-3 lckc lckc order options tape and reel: add #tr lead free: add #pbf lead free tape and reel: add #trpbf lead free part marking: http://www.linear.com/leadfree/ *the temperature grade is identi? ed by a label on the shipping container. consult ltc marketing for parts speci? ed with wider operating temperature ranges. operating temperature range ltc2912c ................................................ 0c to 70c ltc2912i ............................................. C40c to 85c storage temperature range tsot .................................................. C65c to 125c dfn .................................................... C65c to 150c lead temperature (soldering, 10 sec) tsot ................................................................. 300c
ltc2912 3 2912f electrical characteristics note 1: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. exposure to any absolute maximum rating condition for extended periods may affect device reliability and lifetime. note 2: all currents into pins are positive; all voltages are referenced to gnd unless otherwise noted. symbol parameter conditions min typ max units v shunt v cc shunt regulator voltage i cc = 5ma 6.2 6.6 7.2 v v shunt v cc shunt regulator load regulation i cc = 2ma to 10ma 200 300 mv v cc supply voltage (note 3) 2.3 v shunt v v ccr(min) minimum v cc output valid dis = 0v 1v v cc(uvlo) supply undervoltage lockout dis = 0v, v cc rising 1.9 2 2.1 v v cc(uvhyst) supply undervoltage lockout hysteresis dis = 0v 52550 mv i cc supply current v cc = 2.3v to 6v 40 70 a v uot undervoltage/overvoltage threshold 492 500 508 mv t uod undervoltage/overvoltage threshold to output delay v hn = v uot C 5mv or v ln = v uot + 5mv 50 125 500 s i vhl vh, vl input current 15 na t uoto uv/ov time-out period c tmr = 1nf 6 8.5 12.5 ms v latch(vih) ov latch clear input high 1.2 v v latch(vil) ov latch clear input low 0.8 v i latch latch input current v latch > 0.5v 1 a i dis dis input current v dis > 0.5v 1 2 3.3 a v dis(vih) dis input high 1.2 v v dis(vil) dis input low 0.8 v i tmr(up) tmr pull-up current v tmr = 0v C1.3 C2.1 C2.8 a i tmr(down) tmr pull-down current v tmr = 1.6v 1.3 2.1 2.8 a v tmr(dis) timer disable voltage referenced to v cc C180 C270 mv v oh output voltage high uv/ov/ov v cc = 2.3v, i uv/ov = C1a 1v v ol output voltage low uv/ov/ov v cc = 2.3v, i uv/ov = 2.5ma v cc = 1v, i uv = 100a 0.10 0.01 0.30 0.15 v v the denotes the speci? cations which apply over the full operating temperature range, otherwise speci? cations are at t a = 25c. v cc = 3.3v, vl = 0.45v, vh = 0.55v, latch = v cc unless otherwise noted. (note 2) note 3: v cc maximum pin voltage is limited by input current. since the v cc pin has an internal 6.5v shunt regulator, a low impedance supply that exceeds 6v may exceed the rated terminal current. operation from higher voltage supplies requires a series dropping resistor. see applications information.
ltc2912 4 2912f typical performance characteristics input threshold voltage vs temperature supply current vs temperature v cc shunt voltage vs temperature v cc shunt voltage vs i cc uv output voltage vs v cc typical transient duration vs comparator overdrive timing diagrams vh monitor timing vh monitor timing (tmr pin strapped to v cc ) vl monitor timing vl monitor timing (tmr pin strapped to v cc ) vh uv v uot 1v t uod t uoto 2912 td01 vl ov v uot 1v t uod t uoto 2912 td02 vh uv v uot 1v t uod t uod 2912 td03 vl ov v uot 1v t uod t uod 2912 td04 temperature ( c) C50 0.495 threshold voltage, v uot (v) 0.497 0.499 0.501 C25 0 25 50 2912 g01 75 0.503 0.505 0.496 0.498 0.500 0.502 0.504 100 temperature ( c) C50 20 i cc ( a) 25 30 35 40 C25 0 25 50 2912 g02 75 100 v cc = 6v v cc = 3.3v v cc = 2.3v temperature ( c) C50 6.2 v cc (v) 6.3 6.4 6.5 6.6 6.8 C25 02550 2912 g03 75 100 6.7 200 a 1ma 2ma 5ma 10ma i cc (ma) C2 0 6.25 v cc (v) 6.45 6.75 2 85 c 25 c 6 8 2912 g04 6.35 6.65 6.55 4 10 12 C40 c comparator overdrive past threshold (%) 0.1 400 typical transient duration ( s) 500 600 700 1 10 100 2912 g05 300 200 100 50 v cc = 2.3v v cc = 6v reset occurs above curve supply voltage, v cc (v) 0 uv voltage (v) 0.4 0.6 v cc 0.8 2912 g06 0.2 0 0.2 0.4 0.6 1 0.8 uv with 10k pull-up uv without pull-up
ltc2912 5 2912f uv output voltage vs v cc reset time-out period vs capacitance uv, i sink vs v cc typical performance characteristics uv/ov, voltage output low vs output sink current reset timeout period vs temperature dis (pin 8/pin 1, ltc2912-2): output disable input. disables the ov and uv output pins. when dis is pulled high, the ov and uv pins are not asserted except during a uvlo condition. pin has a weak (2a) internal pull-down to gnd. leave pin open if unused. exposed pad (pin 9, ddb package): exposed pad may be left open or connected to device ground. gnd (pin 5/pin 4): device ground. latch (pin 8/pin 1, ltc2912-1, ltc2912-3): ov/ov latch clear/bypass input. when pulled high, ov/ov latch is cleared. while held high, ov/ov has a similar delay and output characteristic as uv. ov (pin 6/pin 3, ltc2912-1, ltc2912-2): overvoltage logic output. asserts low when the vl input voltage is above threshold. latched low (ltc2912-1). held low for programmed delay time after vl input is valid (ltc2912-2). pin has a weak pull-up to v cc and may be pulled above v cc using an external pull-up. leave pin open if unused. pin functions (dfn/tsot packages) supply voltage, v cc (v) 0 uv voltage (v) 3 4 5 4 2912 g07 2 1 0 1 2 3 5 vh = 0.55v sel = v cc tmr pin capacitance, c tmr (nf) 10 uv/ov timeout period, t uoto (ms) 100 1000 10000 0.1 10 100 1000 2912 g08 1 1 supply voltage, v cc (v) 0 pull-down current, i uv (ma) 3 4 5 4 2912 g09 2 1 0 1 2 3 5 vh = 0.45v sel = v cc uv at 150mv uv at 50mv i uv/ov (ma) 0 0 uv/ov, v ol (v) 0.2 0.4 0.6 0.8 1.0 5 10 15 20 1912 g10 25 C40 c 30 25 c 125 c temperature ( c) C50 6 uv/ov timeout period, t outo (ms) 7 8 9 10 12 C25 02550 2912 g11 75 100 11 c tmr = 1nf
ltc2912 6 2912f block diagram 0.5v + C 3 vl 2 + C vh + C uvlo uvlo 2v v cc + C 1v v cc ov pulse generator disable disable ov latch clear/bypass ltc2912-1, ltc2912-3 tmr v cc 4 ov/ov 6 latch 8 + C 1v 2 a dis 8 gnd 2912 bd 5 1 uv pulse generator oscillator v cc 400k uv 7 400k ltc2912-1 ltc2912-2 ltc2912-3 ltc2912-2 ov (pin 6/pin 3, ltc2912-3): overvoltage logic output. asserts high with a weak internal pull-up to v cc when the vl input is above threshold. latches high. may be pulled above v cc using an external pull-up. leave pin open if unused. tmr (pin 4/pin 5): reset delay timer. attach an external capacitor (c tmr ) of at least 10pf to gnd to set a reset delay time of 9ms/nf. a 1nf capacitor will generate an 8.5ms reset delay time. tie pin to v cc to bypass timer. uv (pin 7/pin 2): undervoltage logic output. asserts low when the vh input voltage is below threshold. held low for a programmed delay time after the vh input is valid. pin has a weak pull-up to v cc and may be pulled above v cc using an external pull-up. leave pin open if unused. v cc (pin 1/pin 8): supply voltage. bypass this pin to gnd with a 0.1f (or greater) capacitor. operates as a direct supply input for voltages up to 6v. operates as a shunt regulator for supply voltages greater than 6v and should have a resistance between the pin and the supply to limit input current to no greater than 10ma. when used without a current-limiting resistance, pin voltage must not exceed 6v. vh (pin 2/pin 7): voltage high input. when the voltage on this pin is below 0.5v, an undervoltage condition is triggered. tie pin to v cc if unused. vl (pin 3/pin 6): voltage low input. when the voltage on this pin is above 0.5v, an overvoltage condition is triggered. tie pin to gnd if unused. pin functions (dfn/tsot packages)
ltc2912 7 2912f applications information voltage monitoring the ltc2912 is a low power voltage monitoring circuit with an undervoltage and an overvoltage input. a timeout period that holds ov and uv asserted after a fault has cleared is adjustable using an external capacitor and may be externally disabled. when con? gured to monitor a posi- tive voltage v n using the 3-resistor circuit con? guration shown in figure 1, vh will be connected to the high side tap of the resistive divider and vl will be connected to the low side tap of the resistive divider. 3-step design procedure the following 3-step design procedure allows selecting appropriate resistances to obtain the desired uv and ov trip points for the voltage monitor circuit in figure 1. for supply monitoring, v n is the desired nominal operat- ing voltage, i n is the desired nominal current through the resistive divider, v ov is the desired overvoltage trip point and v uv is the desired undervoltage trip point. 1. choose r a to obtain the desired ov trip point r a is chosen to set the desired trip point for the overvoltage monitor. r v i v v a n n ov = 05 . ? (1) 2. choose r b to obtain the desired uv trip point once r a is known, r b is chosen to set the desired trip point for the undervoltage monitor. r v i v v r b n n uv a = 05 . ?C (2) 3. choose r c to complete the design once r a and r b are known, r c is determined by: r v i rr c n n ab = CC (3) if any of the variables v n , i n , v uv or v ov change, then each step must be recalculated. voltage monitor example a typical voltage monitor application is shown in figure 2. the monitored voltage is a 5v 10% supply. nominal cur- rent in the resistive divider is 10a. 1. find r a to set the ov trip point of the monitor. r v a v v k a = 05 10 5 55 45 3 . ? . . 2. find r b to set the uv trip point of the monitor. r v a v v kk b =? 05 10 5 45 45 3 10 2 . ? . C. . 3. determine r c to complete the design. r v a kkk c =? 5 10 45 3 10 2 442 C. . figure 1. 3-resistor positive uv/ov monitoring con? guration figure 2. typical supply monitor C + C + + C 0.5v ltc2912 uv vh r c r b r a 2912 f01 v n vl ov vh1 r c 442k r b 10.2k r a 45.3k v cc gnd ltc2912-1 vl1 2912 f02 ov uv v cc 5v v1 5v 10%
ltc2912 8 2912f applications information power-up/power-down as soon as v cc reaches 1v during power up, the uv output asserts low and the ov output weakly pulls to v cc . the ltc2912 is guaranteed to assert uv low, ov high (ltc2912-1, ltc2912-2) and ov low (ltc2912-3) under conditions of low v cc , down to v cc = 1v. above v cc = 2v (2.1v maximum), the vh and vl inputs take control. once the vh input and v cc become valid an internal timer is started. after an adjustable delay time, uv weakly pulls high. threshold accuracy reset threshold accuracy is important in a supply-sensitive system. ideally, such a system resets only if supply voltages fall outside the exact thresholds for a speci? ed margin. both ltc2912 inputs have a relative threshold accuracy of 1.5% over the full operating temperature range. for example, when the ltc2912 is programmed to moni- tor a 5v input with a 10% tolerance, the desired uv trip point is 4.5v. because of the 1.5% relative accuracy of the ltc2912, the uv trip point can be anywhere between 4.433v and 4.567v which is 4.5v 1.5%. likewise, the accuracy of the resistances chosen for r a , r b and r c can affect the uv and ov trip points as well. using the example just given, if the resistances used to set the uv trip point have 1% accuracy, the uv trip range is between 4.354v and 4.650v. this is illustrated in the following calculations. the uv trip point is given as: vv r rr uv c ab =+ + ? ? ? ? ? ? 05 1 . the two extreme conditions, with a relative accuracy of 1.5% and resistance accuracy of 1%, result in: vv r rr uv min c ab () .?. ? ?. ?. =+ + () ? ? 05 0985 1 099 101 ?? ? ? ? =+ + ( and vv r rr uv max c ab () .?. ? ?. 05 1015 1 101 )) ? ? ? ? ? ? ?. 099 for a desired trip point of 4. 5 5v, r c rr ab + = 8 therefore, vv v a uv min () .?. ? . . . =+ ? ? ? ? = 05 0985 1 8 099 101 4 354 n nd vv uv max () .?. ? . . . =+ ? ? ? ? = 05 1015 1 8 101 099 4 650 0v glitch immunity in any supervisory application, noise riding on the moni- tored dc voltage causes spurious resets. to solve this problem without adding hysteresis, which causes a new error term in the trip voltage, the ltc2912 lowpass ? lters the output of the ? rst stage comparator at each input. this ? lter integrates the output of the comparator before as- serting the uv or ov logic. a transient at the input of the comparator of suf? cient magnitude and duration triggers the output logic. the typical performance characteristics show a graph of the transient duration vs comparator overdrive. uv/ov timing the ltc2912 has an adjustable timeout period (t uoto ) that holds ov, ov or uv asserted after each fault has cleared. this delay assures a minimum reset pulse width allowing settling time for the monitored voltage after it has entered the valid region of operation.
ltc2912 9 2912f applications information when the vh input drops below its designed threshold, the uv pin asserts low. when the input recovers above its designed threshold, the uv output timer starts. if the input remains above the designed threshold when the timer ? nishes, the uv pin weakly pulls high. however, if the input falls below its designed threshold during this timeout period, the timer resets and restarts when the input is above the designed threshold. the ov and ov outputs behave as the uv output when latch is high (ltc2912-1, ltc2912-3). selecting the uv/ov timing capacitor the uv and ov timeout period (t uoto ) for the ltc2912 is adjustable to accommodate a variety of applications. connecting a capacitor, c tmr , between the tmr pin and ground sets the timeout period. the value of capacitor needed for a particular timeout period is: c tmr = t uoto ? 115 ? 10 C9 [f/s] the reset timeout period vs capacitance graph found in the typical performance characteristics shows the desired delay time as a function of the value of the timer capacitor that must be used. the tmr pin must have a minimum 10pf load or be tied to v cc . for long timeout periods, the only limitation is the availability of a large value capaci- tor with low leakage. capacitor leakage current must not exceed the minimum tmr charging current of 1.3a.tying the tmr pin to v cc bypasses the timeout period. undervoltage lockout when v cc falls below 2v, the ltc2912 asserts an undervoltage lockout (uvlo) condition. during uvlo, uv is asserted and pulled low while ov and ov are cleared and blocked from asserting. when v cc rises above 2v, uv follows the same timing procedure as an undervoltage condition on the vh input. shunt regulator the ltc2912 has an internal shunt regulator. the v cc pin operates as a direct supply input for voltages up to 6v. under this condition, the quiescent current of the device remains below a maximum of 70a. for v cc voltages higher than 6v, the device operates as a shunt regulator and should have a resistance r z between the supply and the v cc pin to limit the current to no greater than 10ma. when choosing this resistance value, select an appropriate location on the i-v curve shown in the typical performance characteristics to accommodate any variations in v cc due to changes in current through r z . uv, ov and ov output characteristics the dc characteristics of the uv, ov and 0v pull-up and pull-down strength are shown in the typical performance characteristics. each pin has a weak internal pull-up to v cc and a strong pull-down to ground. this arrangement allows these pins to have open-drain behavior while pos- sessing several other bene? cial characteristics. the weak pull-up eliminates the need for an external pull-up resistor when the rise time on the pin is not critical. on the other hand, the open-drain con? guration allows for wired-or connections, and is useful when more than one signal needs to pull down on the output. v cc of 1v guarantees a maximum v ol = 0.15v at uv. at v cc = 1v, the weak pull-up current on ov is barely turned on. therefore, an external pull-up resistor of no more than 100k is recommended on the ov pin if the state and pull-up strength of the ov pin is crucial at very low v cc . note however, by adding an external pull-up resistor, the pull-up strength on the ov pin is increased. therefore, if it is connected in a wired-or connection, the pull-down strength of any single device must accommodate this additional pull-up strength. output rise and fall time estimation the uv, ov and ov outputs have strong pull-down capabil- ity. the following formula estimates the output fall time (90% to 10%) for a particular external load capacitance (c load ): t fall 2.2 ? r pd ? c load where r pd is the on-resistance of the internal pull-down transistor, typically 50 at v cc > 1v and at room tem- perature (25c). c load is the external load capacitance on the pin. assuming a 150pf load capacitance, the fall time is 16.5ns.
ltc2912 10 2912f typical applications applications information the rise time on the uv, ov and 0v pins is limited by a 400k pull-up resistance to v cc . a similar formula esti- mates the output rise time (10% to 90%) at the uv, ov and ov pins: t rise 2.2 ? r pu ? c load where r pu is the pull-up resistance. ov/ov latch (ltc2912-1, ltc2912-3) with the latch pin held low, the ov pin latches low (ltc2912-1) and the ov pin latches high (ltc2912-3) when an ov condition is detected. the latch is cleared by raising the latch pin high. if an ov condition clears while latch is held high, the latch is bypassed and the ov and ov pins behave the same as the uv pin with a similar timeout period at the output. if latch is pulled low while the timeout period is active, the ov and ov pins latch as before. disable (ltc2912-2) the ltc2912-2 allows disabling the uv and ov outputs via the dis pin. pulling dis high forces both outputs to remain weakly pulled high, regardless of any faults that occur on the inputs. however, if a uvlo condition oc- curs, uv asserts and pulls low, but the timeout function is bypassed. uv pulls high as soon as the uvlo condition is cleared. dis has a weak 2a (typical) internal pull-down current guaranteeing normal operation with the pin left open. dual uv/ov supply monitor, 3.3v 10% tolerance 48v supply monitor (<10% = powergood) dual uv supply monitor, 3.3v, 2.5v, 10% tolerance r b 1k r c 27.4k vh 1 6 7 2 3 8 4 5 vl gnd tmr system power supply ov uv 2912 ta02 latch c tmr 22nf timeout = 200ms r a 4.53k v cc ltc2912-1 c byp 0.1 f 3.3v r b 80.6k r c 37.4m r z 200k r pg 30k powergood led vh 1 6 7 2 3 8 4 5 vl gnd tmr power supply ov uv 2912 ta03 dis r a 357k c tmr 10nf timeout = 85ms v cc ltc2912-2 c byp 0.1 f 48v r a1 11k r b1 54.9k r b2 39.2k r ov 10k v h 1 6 7 2 3 8 4 5 v l gnd tmr system power supplies ov uv 2912 ta04 dis r a2 11k v cc ltc2912-2 c byp 0.1 f 2.5v 3.3v r uv 10k
ltc2912 11 2912f information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no representa- tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. package description ddb package 8-lead plastic dfn (3mm 2mm) (reference ltc dwg # 05-08-1702 rev b) ts8 package 8-lead plastic tsot-23 (reference ltc dwg # 05-08-1637) 2.00 0.10 (2 sides) note: 1. drawing conforms to version (wecd-1) in jedec package outline m0-229 2. drawing not to scale 3. all dimensions are in millimeters 4. dimensions of exposed pad on bottom of package do not include mold flash. mold flash, if present, shall not exceed 0.15mm on any side 5. exposed pad shall be solder plated 6. shaded area is only a reference for pin 1 location on the top and bottom of package 0.40 0.10 bottom viewexposed pad 0.56 0.05 (2 sides) 0.75 0.05 r = 0.115 typ r = 0.05 typ 2.15 0.05 (2 sides) 3.00 0.10 (2 sides) 1 4 8 5 pin 1 bar top mark (see note 6) 0.200 ref 0 C 0.05 (ddb8) dfn 0905 rev b 0.25 0.05 0.50 bsc pin 1 r = 0.20 or 0.25 45 chamfer 0.25 0.05 2.20 0.05 (2 sides) recommended solder pad pitch and dimensions 0.61 0.05 (2 sides) 1.15 0.05 0.70 0.05 2.55 0.05 package outline 0.50 bsc 1.50 C 1.75 (note 4) 2.80 bsc 0.22 C 0.36 8 plcs (note 3) datum a 0.09 C 0.20 (note 3) ts8 tsot-23 0802 2.90 bsc (note 4) 0.65 bsc 1.95 bsc 0.80 C 0.90 1.00 max 0.01 C 0.10 0.20 bsc 0.30 C 0.50 ref pin one id note: 1. dimensions are in millimeters 2. drawing not to scale 3. dimensions are inclusive of plating 4. dimensions are exclusive of mold flash and metal burr 5. mold flash shall not exceed 0.254mm 6. jedec package reference is mo-193 3.85 max 0.52 max 0.65 ref recommended solder pad layout per ipc calculator 1.4 min 2.62 ref 1.22 ref
ltc2912 12 2912f linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 fax: (408) 434-0507 www.linear.com ? linear technology corporation 2006 lt 1006 ? printed in usa related parts typical application single uv/ov supply monitor with 3.3v 10% part number description comments ltc690 5v supply monitor, watchdog timer and battery backup 4.65 threshold ltc694-3.3 3.3v supply monitor, watchdog timer and battery backup 2.9v threshold ltc699 5v supply monitor and watchdog timer 4.65 threshold ltc1232 5v supply monitor, watchdog timer and push-button reset 4.37v/4.62v threshold ltc1326/ ltc1326-2.5 micropower precision triple supply monitor for 5v/2.5v, 3.3v and adj 4.725v, 3.118v, 1v threshold (0.75%) ltc1536 precision triple supply monitor for pci applications meets pci t fail timing speci? cations ltc1726-2.5/ ltc1726-5 micropower triple supply monitor for 2.5v/5v, 3.3v and adj adjustable reset and watchdog time-outs ltc1728-1.8/ ltc1728-3.3 micropower triple supply monitor with open-drain reset 5-lead sot-23 package ltc1985-1.8 micropower triple supply monitor with open-drain reset 5-lead sot-23 package ltc2900 programmable quad supply monitor adjustable reset, 10-lead msop and 3mm 3mm 10-lead dfn package ltc2901 programmable quad supply monitor adjustable reset and watchdog timer, 16-lead ssop package ltc2902 programmable quad supply monitor adjustable reset and tolerance, 16-lead ssop package, margining functions ltc2903 precision quad supply monitor 6-lead tsot-23 package, ultralow voltage reset ltc2904 3-state programmable precision dual supply monitor adjustable tolerance, 8-lead tsot-23 package ltc2905 3-state programmable precision dual supply monitor adjustable reset and tolerance, 8-lead tsot-23 package ltc2906 precision dual supply monitor 1-selectable and 1 adjustable separate v cc pin, rst/rst outputs ltc2907 precision dual supply monitor 1-selectable and 1 adjustable separate v cc , adjustable reset timer ltc2908 precision six supply monitor (four fixed & 2 adjustable) 8-lead tsot-23 and dfn packages ltc2909 prevision dual input uv, ov and negative voltage monitor separate v cc pin, adjustable reset timer, 8-lead tsot-23 and dfn packages ltc2913 dual uv/ov voltage monitor separate v cc pin, two inputs, adjustable reset timer, 10-lead msop and dfn packages ltc2914 quad uv/ov positive/negative voltage monitor separate v cc pin, four inputs, up to two negative monitors, adjustable reset timer, 16-lead tssop and dfn packages 1k 27.4k 10k q1 vh vl gnd tmr system power supply ov uv 2912 ta05 latch 22nf timeout = 200ms 4.53k v cc ltc2912-3 0.1 f 3.3v 12v

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